Integrated circuits operate at high speed and the slightest internal weakness could result in failure of their overall operation. For circuits used in particularly stressed environments, such as those encountered in space missions, the radiative environment or the temperature constraints for example increase the sensitivity to weaknesses or to small internal faults.
To determine the weaknesses of integrated circuits, a known technique is to subject integrated circuits to local laser radiation and to assess the operation of the circuit under such a stress.
Specifically, a known technique is to excite the circuit with an input signal while the latter is subjected to laser radiation and to check that the result obtained at the output of the circuit is correct. The laser is applied to a reduced area of the integrated circuit and the test is repeated for several positions of the laser on the surface of the circuit, so as to sweep the entire circuit and thus create a map of the circuit for identifying the areas which, when they are subjected to laser radiation, lead to the circuit outputting a non-compliant result.
Such a method is disclosed, for example, in document U.S. Pat. No. 6,483,322 and document U.S. Pat. No. 4,698,587.
These analysis methods are relatively effective but provide for only detecting major faults in the circuit which, when they are subjected to laser radiation, lead to a visible malfunctioning of the circuit, in the sense that it does not provide the expected result.
However, such a method is not capable of locating minor faults which nevertheless can prove detrimental during repeated use of the circuit in a particularly stressed environment.